Rolf Drechsler

Advanced Formal Verification

Debugging At The Electronic System Level

Quality-Driven Systemc Design

Evolutionary Algorithms For Embedded System Design

Towards A Design Flow For Reversible Logic

In-Memory Computing

Erweiterte Virtuelle Prototypen Für Heterogene Systeme

Enhanced Virtual Prototyping For Heterogeneous Systems

Automatisierte Analyse Von Virtuellen Prototypen Auf Der Ebene Elektronischer Systeme

Design Automation For Field-Coupled Nanotechnologies

Enhanced Virtual Prototyping For Heterogeneous Systems

Design For Testability, Debug And Reliability

Design Automation For Field-Coupled Nanotechnologies

Automated Analysis Of Virtual Prototypes At The Electronic System Level

Enhanced Virtual Prototyping

Noch Analog Oder Lebst Du Schon?

In-Memory Computing

Automated Analysis Of Virtual Prototypes At The Electronic System Level

Automated Validation & Verification Of Uml/Ocl Models Using Satisfiability Solvers

Design Automation Techniques For Approximation Circuits

Automated Validation & Verification Of Uml/Ocl Models Using Satisfiability Solvers

Exact Design Of Digital Microfluidic Biochips

Robustness And Usability In Modern Design Flows

Reversible And Quantum Circuits

Spectral Techniques In Vlsi Cad

Towards One-Pass Synthesis

Robustness And Usability In Modern Design Flows

Reversible And Quantum Circuits

Formal Specification Level

Graphenbasierte Funktionsdarstellung

Formal Specification Level

Debugging At The Electronic System Level

Evolutionary Algorithms For Vlsi Cad

Computer

Test Pattern Generation Using Boolean Proof Engines

Automatic Methods For The Refinement Of System Models

Evolutionary Algorithms For Vlsi Cad

Quality-Driven Systemc Design

High Quality Test Pattern Generation And Boolean Satisfiability