Rainer Leupers

Retargetable Code Generation For Digital Signal Processors

Customizable Embedded Processors

C Compilers For Asips

Application Analysis Tools For Asip Design

Multiprocessor Systems On Chip

Language-Driven Exploration And Implementation Of Partially Re-Configurable Asips

Power Estimation On Electronic System Level Using Linear Power Models

Logic Locking

Retargetable Compiler Technology For Embedded Systems

Programming Heterogeneous Mpsocs

Code Optimization Techniques For Embedded Processors

Programming Heterogeneous Mpsocs

Application Analysis Tools For Asip Design

Language-Driven Exploration And Implementation Of Partially Re-Configurable Asips

Architecture Exploration For Embedded Processors With Lisa

Retargetable Code Generation For Digital Signal Processors

Code Optimization Techniques For Embedded Processors

Integrated System-Level Modeling Of Network-On-Chip Enabled Multi-Processor Platforms

Retargetable Compiler Technology For Embedded Systems

Integrated System-Level Modeling Of Network-On-Chip Enabled Multi-Processor Platforms

Retargetable Processor System Integration Into Multi-Processor System-On-Chip Platforms

Retargetable Processor System Integration Into Multi-Processor System-On-Chip Platforms

Multiprocessor Systems On Chip

C Compilers For Asips

Optimized Asip Synthesis From Architecture Description Language Models

Architecture Exploration For Embedded Processors With Lisa

Optimized Asip Synthesis From Architecture Description Language Models

Logic Locking