Rainer Leupers

Retargetable Code Generation For Digital Signal Processors

Customizable Embedded Processors

C Compilers For Asips

Application Analysis Tools For Asip Design

Multiprocessor Systems On Chip

Language-Driven Exploration And Implementation Of Partially Re-Configurable Asips

Logic Locking

Retargetable Compiler Technology For Embedded Systems

Programming Heterogeneous Mpsocs

Code Optimization Techniques For Embedded Processors

Programming Heterogeneous Mpsocs

Application Analysis Tools For Asip Design

Language-Driven Exploration And Implementation Of Partially Re-Configurable Asips

Architecture Exploration For Embedded Processors With Lisa

Retargetable Code Generation For Digital Signal Processors

Integrated System-Level Modeling Of Network-On-Chip Enabled Multi-Processor Platforms

Code Optimization Techniques For Embedded Processors

Retargetable Processor System Integration Into Multi-Processor System-On-Chip Platforms

Retargetable Compiler Technology For Embedded Systems

Integrated System-Level Modeling Of Network-On-Chip Enabled Multi-Processor Platforms

Multiprocessor Systems On Chip

C Compilers For Asips

Retargetable Processor System Integration Into Multi-Processor System-On-Chip Platforms

Optimized Asip Synthesis From Architecture Description Language Models

Architecture Exploration For Embedded Processors With Lisa

Optimized Asip Synthesis From Architecture Description Language Models

Logic Locking