Robert K Brayton

Integrating Functional And Temporal Domains In Logic Design

Integrating Functional And Temporal Domains In Logic Design

Timed Boolean Functions

Logic Minimization Algorithms For Vlsi Synthesis

Timed Boolean Functions

The Unknown Component Problem

Synthesis Of Finite State Machines

Synthesis Of Finite State Machines

Synthesis Of Finite State Machines

Logic Synthesis For Field-Programmable Gate Arrays

Logic Synthesis For Field-Programmable Gate Arrays

Cross-Talk Noise Immune Vlsi Design Using Regular Layout Fabrics

Regular Fabrics In Deep Sub-Micron Integrated-Circuit Design

Regular Fabrics In Deep Sub-Micron Integrated-Circuit Design

The Unknown Component Problem