Meyr Heinrich

Design Of Energy-Efficient Application-Specific Instruction Set Processors

Retargetable Processor System Integration Into Multi-Processor System-On-Chip Platforms

Integrated System-Level Modeling Of Network-On-Chip Enabled Multi-Processor Platforms

Optimized Asip Synthesis From Architecture Description Language Models

Architecture Exploration For Embedded Processors With Lisa

Optimized Asip Synthesis From Architecture Description Language Models

Integrated System-Level Modeling Of Network-On-Chip Enabled Multi-Processor Platforms

Architecture Exploration For Embedded Processors With Lisa

Retargetable Processor System Integration Into Multi-Processor System-On-Chip Platforms

Language-Driven Exploration And Implementation Of Partially Re-Configurable Asips

Language-Driven Exploration And Implementation Of Partially Re-Configurable Asips

Design Of Energy-Efficient Application-Specific Instruction Set Processors