Brayton, Robert K.

Logic Minimization Algorithms For Vlsi Synthesis

Regular Fabrics In Deep Sub-Micron Integrated-Circuit Design

Regular Fabrics In Deep Sub-Micron Integrated-Circuit Design

Timed Boolean Functions

Cross-Talk Noise Immune Vlsi Design Using Regular Layout Fabrics

Logic Synthesis For Field-Programmable Gate Arrays

Logic Synthesis For Field-Programmable Gate Arrays

Synthesis Of Finite State Machines

Synthesis Of Finite State Machines

Synthesis Of Finite State Machines

The Unknown Component Problem

The Unknown Component Problem

Timed Boolean Functions

Integrating Functional And Temporal Domains In Logic Design

Integrating Functional And Temporal Domains In Logic Design