Edge Computing Acceleration - Greg Knopf
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Présentation Edge Computing Acceleration de Greg Knopf Format Relié
- Livre Technologie
Résumé : About the Authors xi Foreword (professor Ray Cheung) xiii Foreword (Raghu Nambiar) xv Preface xvii Acknowledgment (Patrick Hung) xix Acknowledgment (Greg Knopf) xxi Part I Introduction 1 1 Introduction 3 1.1 Introducing 5G and Internet of Everything 4 1.2 Edge Computing Architecture 8 1.2.1 Edge Versus Cloud Computing 10 1.2.2 Edge Design Options 11 1.2.3 Key Benefits of Edge Computing 12 1.3 Custom Computing 14 1.3.1 Introduction to Custom Computing 14 1.3.2 5G/6G Security Concerns 15 1.3.3 Custom Edge Computing Cards 17 1.4 Deployment Considerations 18 1.4.1 5G/6G Cell Architecture 19 1.4.2 5G/6G Private Network 21 1.4.3 Infrastructure Sharing 23 References 26 2 Overview of 5G and 6G 31 2.1 5G Timeline 31 2.2 5G Spectrum 32 2.3 Characteristics of 5G 34 2.4 5G New Radio 34 2.4.1 Orthogonal Frequency-Division Multiplexing 34 2.4.2 Massive MIMO 36 2.4.3 Beamforming 37 2.4.4 Multiuser MIMO 38 2.5 Data Plane and Control Plane Separation 38 2.6 5G Applications 40 2.7 Smooth Transition to 6G 42 2.8 6G Expected Timeline, Spectrum, and Characteristics 46 2.9 6G Potential Applications 48 2.10 Edge, Fog, and Cloud Computing in Relation to 5G and 6G 50 2.10.1 Edge Computing in Relation to 5G and 6G 51 2.10.2 Fog Computing in Relation to 5G and 6G 53 2.10.3 Cloud Computing in Relation to 5G and 6G 55 References 57 Part II Theory 63 3 High-Level Synthesis (HLS) 65 3.1 Why Use High-Level Synthesis? 67 3.1.1 Hardware Acceleration with High-Level Synthesis 68 3.2 Common HLS Languages and Platforms 69 3.2.1 Compute Unified Device Architecture (CUDA) 70 3.2.1.1 CUDA and HLS for Hardware Acceleration 70 3.2.1.2 Advantage of Using CUDA and HLS for Hardware Acceleration 71 3.2.2 OpenCL 72 3.2.2.1 OpenCL and HLS for Hardware Acceleration 73 3.2.2.2 Advantages of Using OpenCL with HLS Tools for Hardware Acceleration 74 3.2.3 Maxeler MaxJ 75 3.2.3.1 Using Maxeler MaxJ with HLS for Hardware Acceleration 76 3.2.3.2 Advantages of Using Maxeler MaxJ with HLS for Hardware Acceleration 77 3.3 Limitations and Challenges of HLS 79 3.4 Using HLS in 5G Edge Computing 80 3.4.1 User (Data) Plane Acceleration 81 3.4.2 Control Plane Acceleration 82 3.4.3 Advantages of Using HLS for User Plane and Control Plane Acceleration 83 References 85 4 Coding Design 89 4.1 Overview 89 4.2 Error Correction Codes (ECCs) 90 4.2.1 Turbo, Low-Density Parity-Check, and Polar Codes 92 4.2.1.1 Turbo Codes 93 4.2.1.2 LDPC Codes 94 4.2.1.3 Polar Codes 97 4.3 Security Codes 98 4.3.1 Public Key Infrastructure 99 4.3.2 Symmetric and Asymmetric Cryptography Concepts 100 4.3.2.1 Symmetric Key Cryptography 100 4.3.2.2 Asymmetric Key Cryptography 101 4.3.3 Existing Algorithms and Standards 103 4.3.3.1 Advanced Encryption Standard 103 4.3.3.2 RSA Algorithm 103 4.3.3.3 Elliptic Curve Cryptography 104 4.4 Emerging 5G Security Design Acceleration 105 4.4.1 Blockchain 105 4.4.2 Lightweight Encryption Algorithms 108 4.4.2.1 SIMON and SPECK Algorithms 108 4.4.2.2 PRESENT Algorithm 110 4.4.2.3 GIFT Algorithm 112 4.4.3 Network Codes 113 4.4.4 Post-Quantum Cryptography 115 4.4.5 Homomorphic Encryption 116 4.4.6 Zero-Knowledge Proof 118
Biographie: Patrick Hung, PhD, is a co-founder of Alta Sicuro Technology, and was Consulting Assistant Professor at Stanford University. He is currently Vice-Chairman of IEEE Hong Kong Section Computer Society Chapter and IEEE ESOC Technical Committee member. Dr. Hung was Taishan Scholar in China and CBI Overseas Scholar in UK. Hongwei Kan is Chief Expert & General Manager at the Institute of Pioneering Technologies (IPT) at Tsinghua Unigroup, responsible for designing and development its next-generation computer architecture. Mr. Kan is a Visiting Professor at Beijing University of Posts and Telecommunications and the China University of Mining and Technology. Greg Knopf is Senior Director of Server Customer Engineering at Advanced Micro Devices (AMD). Through his engineering leadership roles at AMD and Intel, Mr. Knopf contributed to the development of more than ten generations of flagship server CPUs....
Sommaire: About the Authors xi Foreword (professor Ray Cheung) xiii Foreword (Raghu Nambiar) xv Preface xvii Acknowledgment (Patrick Hung) xix Acknowledgment (Greg Knopf) xxi Part I Introduction 1 1 Introduction 3 1.1 Introducing 5G and Internet of Everything 4 1.2 Edge Computing Architecture 8 1.2.1 Edge Versus Cloud Computing 10 1.2.2 Edge Design Options 11 1.2.3 Key Benefits of Edge Computing 12 1.3 Custom Computing 14 1.3.1 Introduction to Custom Computing 14 1.3.2 5G/6G Security Concerns 15 1.3.3 Custom Edge Computing Cards 17 1.4 Deployment Considerations 18 1.4.1 5G/6G Cell Architecture 19 1.4.2 5G/6G Private Network 21 1.4.3 Infrastructure Sharing 23 References 26 2 Overview of 5G and 6G 31 2.1 5G Timeline 31 2.2 5G Spectrum 32 2.3 Characteristics of 5G 34 2.4 5G New Radio 34 2.4.1 Orthogonal Frequency-Division Multiplexing 34 2.4.2 Massive MIMO 36 2.4.3 Beamforming 37 2.4.4 Multiuser MIMO 38 2.5 Data Plane and Control Plane Separation 38 2.6 5G Applications 40 2.7 Smooth Transition to 6G 42 2.8 6G Expected Timeline, Spectrum, and Characteristics 46 2.9 6G Potential Applications 48 2.10 Edge, Fog, and Cloud Computing in Relation to 5G and 6G 50 2.10.1 Edge Computing in Relation to 5G and 6G 51 2.10.2 Fog Computing in Relation to 5G and 6G 53 2.10.3 Cloud Computing in Relation to 5G and 6G 55 References 57 Part II Theory 63 3 High-Level Synthesis (HLS) 65 3.1 Why Use High-Level Synthesis? 67 3.1.1 Hardware Acceleration with High-Level Synthesis 68 3.2 Common HLS Languages and Platforms 69 3.2.1 Compute Unified Device Architecture (CUDA) 70 3.2.1.1 CUDA and HLS for Hardware Acceleration 70 3.2.1.2 Advantage of Using CUDA and HLS for Hardware Acceleration 71 3.2.2 OpenCL 72 3.2.2.1 OpenCL and HLS for Hardware Acceleration 73 3.2.2.2 Advantages of Using OpenCL with HLS Tools for Hardware Acceleration 74 3.2.3 Maxeler MaxJ 75 3.2.3.1 Using Maxeler MaxJ with HLS for Hardware Acceleration 76 3.2.3.2 Advantages of Using Maxeler MaxJ with HLS for Hardware Acceleration 77 3.3 Limitations and Challenges of HLS 79 3.4 Using HLS in 5G Edge Computing 80 3.4.1 User (Data) Plane Acceleration 81 3.4.2 Control Plane Acceleration 82 3.4.3 Advantages of Using HLS for User Plane and Control Plane Acceleration 83 References 85 4 Coding Design 89 4.1 Overview 89 4.2 Error Correction Codes (ECCs) 90 4.2.1 Turbo, Low-Density Parity-Check, and Polar Codes 92 4.2.1.1 Turbo Codes 93 4.2.1.2 LDPC Codes 94 4.2.1.3 Polar Codes 97 4.3 Security Codes 98 4.3.1 Public Key Infrastructure 99 4.3.2 Symmetric and Asymmetric Cryptography Concepts 100 4.3.2.1 Symmetric Key Cryptography 100 4.3.2.2 Asymmetric Key Cryptography 101 4.3.3 Existing Algorithms and Standards 103 4.3.3.1 Advanced Encryption Standard 103 4.3.3.2 RSA Algorithm 103 4.3.3.3 Elliptic Curve Cryptography 104 4.4 Emerging 5G Security Design Acceleration 105 4.4.1 Blockchain 105 4.4.2 Lightweight Encryption Algorithms 108 4.4.2.1 SIMON and SPECK Algorithms 108 4.4.2.2 PRESENT Algorithm 110 4.4.2.3 GIFT Algorithm 112 4.4.3 Network Codes 113 4.4.4 Post-Quantum Cryptography 115 4.4.5 Homomorphic Encryption 116 4.4.6 Zero-Knowledge Proof 118 References 120 Pa...