Optimizing HPC Applications with Intel Cluster Tools - Supalov, Alexander

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Résumé :
Optimizing HPC Applications with Intel? Cluster Tools takes the reader on a tour of the fast-growing area of high performance computing and the optimization of hybrid programs. These programs typically combine distributed memory and shared memory programming models and use the Message Passing Interface (MPI) and OpenMP for multi-threading to achieve the ultimate goal of high performance at low power consumption on enterprise-class workstations and compute clusters. The book focuses on optimization for clusters consisting of the Intel? Xeon processor, but the optimization methodologies also apply to the Intel? Xeon Phi(TM) coprocessor and heterogeneous clusters mixing both architectures. Besides the tutorial and reference content, the authors address and refute many myths and misconceptions surrounding the topic. The text is augmented and enriched by descriptions of real-life situations.

Biographie:
Alexander Supalov, PhD, is Intel Cluster Tools Architect and a Senior Staff Engineer at Intel Corporation responsible for setting the direction of the Intel? Parallel Studio XE Cluster Edition and its components: Intel? MPI Library, Intel? Trace Analyzer and Collector, and Intel? MPI Benchmarks. Alexander spent most of the time since early 90?s designing various message passing libraries for different platforms and using them at system and application levels. He was on the team that developed PARMACS 6.0 in 1993, the first full MPI-2 implementation in 2000, and the first Intel? MPI Library in 2004 that became a truly desktop-to PetaFLOPs product by now. Alexander represents Intel Corporation at the MPI Forum, holds 16 patents, and sits on the EuroMPI programme committee.

Sommaire:

Foreword by Bronis de Supinski, CTO, Livermore Computing, LLNL

Introduction

Chapter 1: No Time to Read this Book?

Chapter 2: Overview of Platform Architectures

Chapter 3: Top-Down Software Optimization

Chapter 4: Addressing System Bottlenecks

Chapter 5: Addressing Application Bottlenecks: Distributed Memory

Chapter 6: Addressing Application Bottlenecks: Shared Memory

Chapter 7: Addressing Application Bottlenecks: Microarchitecture

Chapter 8: Application Design Considerations