FPGA Prototyping by SystemVerilog Examples - Pong P. Chu
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Présentation Fpga Prototyping By Systemverilog Examples de Pong P. Chu Format Relié
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Résumé :
A hands-on introduction to FPGA prototyping and SoC design This is the successor edition of the popular FPGA Prototyping by Verilog Examples text. It follows the same learning-by-doing approach to teach the fundamentals and practices of HDL synthesis and FPGA prototyping. The new edition uses a coherent series of examples to demonstrate the process to develop sophisticated digital circuits and IP (intellectual property) cores, integrate them into an SoC (system on a chip) framework, realize the system on an FPGA prototyping board, and verify the hardware and software operation. The examples start with simple gate-level circuits, progress gradually through the RT (register transfer) level modules, and lead to a functional embedded system with custom I/O peripherals and hardware accelerators. Although it is an introductory text, the examples are developed in a rigorous manner, and the derivations follow the strict design guidelines and coding practices used for large, complex digital systems. The book is completely updated and uses the SystemVerilog language, which absorbs the Verilog language. It presents the hardware design in the SoC context and introduces the hardware-software co-design concept. Instead of treating examples as isolated entities, the book integrates them into a single coherent SoC platform that allows readers to explore both hardware and software programmability and develop complex and interesting embedded system projects. The new edition: * Adds four general-purpose IP cores, which are multi-channel PWM (pulse width modulation) controller, I?C controller, SPI controller, and XADC (Xilinx analog-to-digital converter) controller. * Introduces a music synthesizer constructed with a DDFS (direct digital frequency synthesis) module and an ADSR (attack-decay-sustain-release) envelope generator. * Expands the original video controller into a complete stream based video subsystem that incorporates a video synchronization circuit, a test-pattern generator, an OSD (on-screen display) controller, a sprite generator, and a frame buffer. * Provides a detailed discussion on blocking and nonblocking statements and coding styles. * Describes basic concepts of software-hardware co-design with Xilinx MicroBlaze MCS soft-core processor. * Provides an overview of bus interconnect and interface circuit. * Presents basic embedded system software development. * Suggests additional modules and peripherals for interesting and challenging projects. FPGA Prototyping by SystemVerilog Examples makes a natural companion text for introductory and advanced digital design courses and embedded system courses. It also serves as an ideal self-teaching guide for practicing engineers who wish to learn more about this emerging area of interest.
Biographie: PONG P. CHU, PhD is an Associate Professor in the Department of Electrical Engineering and Computer Science at Cleveland State University, Cleveland, Ohio. He has taught undergraduate and graduate digital systems and computer architecture courses for more than two decades, and has received multiple instructional grants from the National Science Foundation.
Sommaire:
Preface Acknowledgements PART I BASIC DIGITAL CIRCUITS DEVELOPMENT 1 Gate-level Combinational Circuit 2 Overview of FPGA and EDA software 3 RT-level Combinational Circuit 4 Regular Sequential Circuit 5 FSM 6 FSMD 7 RAM and Buffer of FPGA 8 Selected Topics of SystemVerilog PART II EMBEDDED SOC I: VANILLA FPRO SYSTEM 9 Overview of Embedded SoC Systems 10 Bare Metal System Software Development 11 FPro Bus Protocol and MMIO Slot Specification 12 UART Core PART III EMBEDDED SOC II: BASIC I/O CORES 13 Xilinx XADC Core 14 Pulse Width Modulation Core 15 Debouncing core and LED-Mux Core 16 SPI Core 17 I2C Core 18 PS2 Core 19 Sound I: DDFS Core 20 Sound II: ADSR Core PART IV EMBEDDED SOC III: VIDEO CORES 21 Introduction to the Video System 22 FPro Video Subsystem 23 Sprite Core 24 On-Screen-Display Core 25 VGA Frame Buffer Core PART V EPILOGUE 26 What's Next References Appendix A: Tutorials Topic Index
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