Interrupt Handling Schemes in Operating Systems -
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Biographie: Pedro Mejia-Alvarez received the BS degree in computer systems engineering from ITESM, Queretaro, Mexico, in 1985 and the PhD degree in informatics from the Universidad Politecnica de Madrid, Spain, in 1995. He has been a Professor in the Department of Computer Science at CINVESTAV-IPN Mexico since 1997. In 1999, he held a research faculty position in the Department of Computer Science at the University of Pittsburgh and, in 2000, a visiting assistant professor position in the Department of Information Sciences and Telecommunications at the University of Pittsburgh. His main research interests are real-time systems scheduling, low-power computing, adaptive fault tolerance, and software engineering. He is member of the IEEE Computer Society. Luis Eduardo Leyva receive the BS degree in Automatic Control Engineering from Instituto Superior Polit?cnico Julio Antonio Mella, Universidad de Oriente, Santiago de Cuba (1989). The Msc. in Computer Science, from Centro de Investigacion en Computacion, Instituto Politecnico Nacional, Mexico,(2000), and PhD in Electrical Engineering from CINVESTAV-IPN, Mexico (2007). He has been a Professor in the Department of Computer Science at Universidad Autonoma Metropolitana, Unidad Cuajimalpa, since 2008. His research interests are Real-Time and Embedded Systems, Distributed Systems and Software Engineering. Arnoldo D?az-Ramirez is a research professor in the department of Computer Systems at Tecnologico Nacional de Mexico/Instituto Tecnologico de Mexicali. He received the BS degree in computer sciences from Cetys University, Mexicali, Mexico, and the Masters degree in computer sciences from the same university. He received the PhD degree in computer sciences from Universitat Politecnica de Valencia, Spain, in 2006. His research interests include real-time systems, Internet of Things, wireless sensor networks, and ubiquiotous computing. He is member of the IEEE Computer Society.
Sommaire: 1. Interrupt Mechanism 1.1.Introduction 1.2.Overview of the Hardware and Software Interrupts 1.3. Hardware of Interrupts in PC Compatible Systems 1.4. Interrupt Acknowledge Cycle 1.5. Interrupt Control Levels 1.5.1. Interrupt Service Routine 1.5.2. Interrupt Handling Initialization 1.5.3. Restoring of the Interrupt Handling System 1.7.1. Priority Scheme 2. Interrupt Handling in Classic Operating Systems 2.1.Introduction 2.2.UNIX Operating System 2.2.1. Non-Premptable Unix Kernel 2.2.2. Conditional Synchronization inside the Kernel 2.2.3. Mutual Exclusion Synchronization between Top and Bottom Halves 2.3.1. Interrupt Handling in Windows NT 2.3.2. Interrupt Handling in Linux 3.1.Introduction 3.3.Interrupt Handling at User Level 3.4.Model of Interrupts as Kernel Threads in Solaris 2.0 3.5.Interrupts Handled as Threads in Real Time Linux 4.1.Introduction 4.3.Schedulable and Non-Schedulable Entities 4.4.Mutual Interference in Traditional Models in Real-Time Systems 4.4.1. Priority Interference 4.4.3. Mutual Exclusion Interference 4.4.4. Sequencing Interference 4.5.Other Issues in Interrupt Handling 4.5.1. Interrupt Elimination 4.5.2. Incorporation of the Interrupt Cost in the feasibility Analysis 4.5.3. Interrupt Handling Overload 5. Interrupt Handling Architectures 5.1.Introduction 5.2.Unified Interrupt Architecture 5.3.Segmented Manager Architecture 5.5.Integrated Mechanisms for Tasks and Interrupt Handling References