Taking AIMS at Digital Design - Jantsch, Axel

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Résumé :
This is an introductory textbook for courses in Synchronous Digital Design that enables students to develop useful intuitions for all of the key concepts of digital design. The author focuses this tutorial on the design flow, which is introduced as an iterative cycle of Analysis, Improvement, Modeling, and Synthesis. All the basic elements of digital design are covered, starting with the CMOS transistor to provide an abstraction upon which everything else is built. The other main foundational concepts introduced are clocked synchronous register-transfer level design, datapath, finite state machines and communication between clock domains. ...

Biographie:
Axel Jantsch received the Dipl.Ing. and Ph.D. degrees in computer science from TU Wien, Vienna, Austria, in 1987 and 1992, respectively. From 1997 to 2002, he was an Associate Professor with the KTH Royal Institute of Technology, Stockholm. From 2002 to 2014, he was a Full Professor of electronic systems design at the KTH. Since 2014, he has been a Professor of systems on chips with the Institute of Computer Technology, TU Wien. He has published five books as an editor and one as the author and over 300 peer-reviewed contributions in journals, books, and conference proceedings. He has given over 100 invited presentations at conferences, universities, and companies. His current research interests include systems on chips, self-aware cyber-physical systems, and embedded machine learning....

Sommaire:
This is an introductory textbook for courses in Synchronous Digital Design that enables students to develop useful intuitions for all of the key concepts of digital design. The author focuses this tutorial on the design flow, which is introduced as an iterative cycle of Analysis, Improvement, Modeling, and Synthesis. All the basic elements of digital design are covered, starting with the CMOS transistor to provide an abstraction upon which everything else is built. The other main foundational concepts introduced are clocked synchronous register-transfer level design, datapath, finite state machines and communication between clock domains. ...