Implementation of Variable Size 2d DCT for Image Compression - Gupta, Neeraj
- Format: Broché Voir le descriptif
Vous en avez un à vendre ?
Vendez-le-vôtreSoyez informé(e) par e-mail dès l'arrivée de cet article
Créer une alerte prix- Payez directement sur Rakuten (CB, PayPal, 4xCB...)
- Récupérez le produit directement chez le vendeur
- Rakuten vous rembourse en cas de problème
Gratuit et sans engagement
Félicitations !
Nous sommes heureux de vous compter parmi nos membres du Club Rakuten !
TROUVER UN MAGASIN
Retour
Avis sur Implementation Of Variable Size 2d Dct For Image Compression Format Broché - Livre Sciences de la vie et de la terre
0 avis sur Implementation Of Variable Size 2d Dct For Image Compression Format Broché - Livre Sciences de la vie et de la terre
Les avis publiés font l'objet d'un contrôle automatisé de Rakuten.
Présentation Implementation Of Variable Size 2d Dct For Image Compression Format Broché
- Livre Sciences de la vie et de la terre
Biographie:
I am Neeraj Gupta, current working as an assistant professor at Amity University Haryana. I have done M.Tech. from GJUS&T,hisar and currently pursuing PhD from Amity University Haryana....
Sommaire:
The discrete cosine transform (DCT) is basically known as compressing mpeg and jpeg images. The basic reason why it is widely used all over is because of its simplicity and easily computed for faster execution. A lot of research is in progress for faster execution of DCT mean while many of algorithms are also developed for compression of video and images. The ancient technique which is being used for limited sizes of images whether it is Chen's technique or Row column decomposition technique. Hardware implementations are difficult and complicated using these codes, have to go through a lengthy and time taking coding scheme. In this work a new and efficient method is proposed using simulink system generator due to which codes are automatically generated and hardware implementation has become easy. This architecture is also useful for different size of images. It supports variable size image. The performance analysis of hardware utilization is effectively carried out.the generated codes are generated in Verilog and hardware utilization is carried out by Fpga virtex 5 xc5vlx110t....